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DVFORGE

Problems Bank

Test your verification and logic skills across various domains.

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Hardware Workbench

Create or open hardware verification projects in the interactive VS Code-style IDE.

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Company:Qualcomm
Assessment:Qualcomm DV Pack

Elapsed Time:00:47:18
Remaining Time:01:12:42

Completed:2 / 3 Questions
Marked For Review:1
Progress:67%

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Problem Title

MEDIUM WRITE
Description Desc Hints Hints Submissions Subs Editorial Edit
dff.sv
SystemVerilog
Icarus Verilog
seq_detector_1101
Dark
1
Compile Output Compile Simulation Output Simulation Assertions Assertions Test Results Results Waveform Viewer Waveform
Compile Output
Console waiting for simulation execution...
Simulation Output
No simulation output available. Run simulation to execute.
Assertion Status
No assertions verified yet.
Testcase Summary
No test results recorded.
Waveform Viewer
Run or submit your solution to generate a waveform.
Learning Paths

Learning Paths

Structured curricula designed to take you from a beginner to a job-ready expert.

SPECIAL 3 hrs

Digital Design & TB Workshop

Hands-on 3-hour workshop covering combinational RTL, sequential counters, self-checking testbenches, and SystemVerilog interfaces across 3 phases.

Progress: 0% (0/6 problems completed)
PATH 1 35 Hours

Zero to DV Job

Learn Verilog basics, SystemVerilog concepts, and write your first UVM testbench from scratch.

Progress: 33% (1/3 modules completed)
PATH 2 50 Hours

UVM Deep Dive

Master the Universal Verification Methodology: agents, sequences, drivers, scoreboards, and virtual sequencers.

Progress: 0% (0/4 modules completed)
PATH 3 25 Hours

SVA & Formal

Write concurrent assertions to catch race conditions and verify designs using formal constraints.

Progress: 0% (0/2 modules completed)
PATH 4 30 Hours

Protocol Verification

Verify complex protocols like AXI4-Lite, APB, and SPI interface protocols from interview questions.

Progress: 0% (0/2 modules completed)
PATH 5 20 Hours

Senior DV Interview Prep

Tackle hard debug logs, pointer synchronization, Clock Domain Crossing (CDC), and coverage analysis.

Progress: 0% (0/2 modules completed)
PATH 6 18 Hours

EDA Scripting Mastery

Learn TCL scripting and log parsing regex expressions to automate complex verification regression suites.

Progress: 0% (0/1 modules completed)
Mock Interviews

Mock Interview Mode

Simulate timed interviews based on actual company hiring assessments.

Following

Experience Preview

Companies

Company Experiences

Weekly Speed Run Contests

Weekly Speed Run Contests

Compete live against other verification students and top scorers globally.

Next Event: June Speed Run Challenge

Solve 3 custom design problems under 90 minutes. Top 3 scorers get direct interviews at Synopsys and a prize pool!

Starts: June 30, 2026 18:00 IST
Prizes: direct interview + ₹10,000 cash pool
Entry Fee: Free during Beta

Past Contests

Contest Title Date Completed Total Solvers Top Solver Action
May Assertion Masterclass May 24, 2026 840 @uvm_guru
Spring FSM Sync Dash April 28, 2026 1120 @system_verily
Ranked Leaderboard

Ranked Leaderboard

See where you stand in the global verification engineering ranking.

Current Season
Season 1
ENDS IN: --
Total Players
0
Your League
Bronze
CLICK TO VIEW PATH
Your Weekly XP
0 XP
Weekly Reset
--:--:--
Your Rank
#--
LEAGUE STANDINGS

Weekly Promotion Rules

Complete digital verification challenges to climb the division ranks. Every Sunday at midnight, the standings lock:

  • Top 30% are promoted to the next tier.
  • Bottom 20% are demoted to the lower tier.
  • Everyone else remains safe in their division.
  • Weekly XP determines relative standings within your league.
Bronze League
Rank User College Solved Weekly XP Lifetime XP Status
Verify-to-Hire Jobs

Verify-to-Hire Jobs

Apply directly to top VLSI design companies.

PS

Prakash S M

@prakash_sv_tb
Electronics & Communication Engineering Verification Engineer Track

RTL design & verification enthusiast.

Gold League Division II

Promotion Standing 0 / 250 XP

Gaining +120 XP will secure your promotion. Season 1
League Standing
Rank #--
Global Standing
Rank #--

Overall Progress

72%
Problems Completed 148 / 300
Interview Packs 8 / 20
Verification Track 72%

Skill Strengths

Activity Heatmap

Submissions: 0
Streak: 0 Days
Active: --

Submissions completed in the past month

Daily XP progression +0 XP Today

Recent Activity Feed

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Last Updated: July 13, 2026

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Your real Run and Submit history from the backend judge.

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